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Toshiba, Western Digital Announce 64-Layer BiCS3 3D NAND
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Toshiba, Western Digital Announce 64-Layer BiCS3 3D NAND

Sam ChenJuly 31, 2016

bics-3d-nand-flash-memory-summit-presentation

Toshiba and Western Digital recently announced that they’ve completed development on BiCS3, their third generation BiCS 3D NAND. According to the announcement, BiCS3 utilizes a 64-layer design and will be available in 256-bit and later on in 512-bit per die capacities.

“BiCS3 will feature the use of 3-bits-per-cell technology along with advances in high aspect ratio semiconductor processing to deliver higher capacity, superior performance and reliability at an attractive cost. Together with BiCS2, our 3D NAND portfolio has broadened significantly, enhancing our ability to address a full spectrum of customer applications in retail, mobile and data center.”

Initial production of BiCS3 has begun at WD and Toshiba’s new facility at Yokkaichi, Japan with samples expected sometime this quarter. Mass production of BiCS3 is expected by 4Q2016 with wide commercial availability expected in 1H2017.

About The Author
Sam Chen
Hardware and Technology Enthusiast. SSD Evangelist. Editor-in-Chief.

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