Everspin Technologies ST-MRAM @ AIS 2012

Posted November 20, 2012 by Michael Chang in Articles
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A number of companies showed off new technologies during LSI’s AIS 2012, but one of the companies whose products really stood out to me was  Everspin Technologies with their ST-MRAM. At their AIS booth, Everspin Technologies demonstrated the first ever commercialized 64 Mb DDR3 ST-MRAM (Spin Torque – Magnetoresistive Random Access Memory). ST-MRAM is a newly developed MRAM technology that takes advantage of “Spin Torque” technology which uses the electron’s spin to record the state of the RAM.

Why is this important? Well, let me try to explain how this innovative technology works and why it could revolutionize computers of the future. Traditional MRAM relies on the use of a high current electric field running above a free layer in order to utilize the magnetic field (right hand rule) to change the state of the “free layer”. The problem with this is that it’s difficult to scale due to the constant and strong magnetic field. With ST-MRAM, Everspin Technologies instead implemented a MTJ (Magnetic Tunnel Junction) that is composed of a dielectric tunnel barrier sandwiched between two magnetic layers. This makes it a lot easier to switch the “free layer” states with less voltage and a smaller resulting magnetic field.

Since I went into a bit on the free and fixed layers, let’s talk a little about that. The bottom most layer is composed of a magnetic thin film that is “fixed” so that the polarity will always be pointing in the same direction. The top most magnetic layer on the other hand, is a “free layer” used to set the state of the RAM to a one or a zero by controlling the spin of the electrons to either go in the same direction of the “fixed” layer of go in the opposite direction. For the visual people out there, check out the diagram above. It’ll all make sense. If not, well it’s just simply better.

Why is this important? Well the first major advantage that “spin torque” brings to the table is that it provides non-volatility and excellent endurance. Currently, the one of the best applications is at the enterprise storage level where companies can’t afford to lose data from their servers. In case of a power outage current servers currently use a combination of batteries and supercaps (super capacitors) to temporarily store the date and hopefully have enough time to get it out of a volatile DRAM cache. The issue with this is that capacitors and batteries will fail requiring maintenance and support while not always guaranteeing the safety of your data. ST-MRAM with its non-volatile properties on the other hand makes wont have either the maintenance issues nor the reliability issues.

Another advantage that the ST-MRAM has is that it actually requires less current to toggle between states, which allows for more transistors to be placed in a chip essentially allowing for more storage space.  At the moment the pricing of this type of RAM is quite high and would only be worth it for large enterprises. However with advancements in technology which would possibly reduce costs I can foresee a future where ST-MRAM will be present our every day consumer electronics.

Since most of us aren’t enterprise customers, the significance of ST-MRAM is simply the fact that it can potentially become the successor to DRAM or NAND flash in the future. While ST-MRAM is indeed an order of magnitude slower than current generation DDR3 DRAM, it’s still quite fast and is non-volatile, which means significant energy savings when used in mobile applications. As a replacement for NAND, it’s pretty obvious as well since ST-MRAM is many orders of magnitudes faster than NAND flash yet still retains the non-volatility of NAND flash. With NAND flash becoming too dense at the sub-10nm level, ST-MRAM has the potential to become the choice for the future.

Currently, pricing on Everspin’s ST-MRAM isn’t cheap and we’re told it’ll cost 100x higher cost per bit vs current generation DDR3 DRAM. In terms of availability, ST-MRAM is already in production and is already available to select partners with more details on broad availability to come in 2013. We’re definitely keeping our eyes on this one! Hit the jump below for the full press release.


About the Author

Michael Chang

During the day Michael Chang is a Process Integration Engineer, where he researches and develops MEMS technologies for logic and memory testing. He has been a tech enthusiast for well over a decade and applies his analytic mind to both his reviews and work.